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  74ac11086 quadruple 2-input exclusive-or gate scas081a november 1989 revised april 1996 1 post office box 655303 ? dallas, texas 75265  center-pin v cc and gnd configurations minimize high-speed switching noise  epic ? (enhanced-performance implanted cmos) 1- m m process  500-ma typical latch-up immunity at 125 c  package options include plastic small-outline (d) packages and standard plastic 300-mil dips (n) description this device contains four independent 2-input exclusive-or gates. it performs the boolean function y = a b = a b + ab in positive logic. a common application is as a true/complement element. if one of the inputs is low, the other input is reproduced in true form at the output. if one of the inputs is high, the signal on the other input is reproduced inverted at the output. the 74ac11086 is characterized for operation from 40 c to 85 c. function table (each gate) inputs output a b y l l l l hh h lh h h l logic symbol 2 1 1a 16 1b 1y 2 15 2a 14 2b 2y 3 11 3a 10 3b 3y 6 9 4a 8 4b 4y 7 =1 2 this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12. copyright ? 1996, texas instruments incorporated production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. epic is a trademark of texas instruments incorporated. 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1a 1y 2y gnd gnd 3y 4y 4b 1b 2a 2b v cc v cc 3a 3b 4a d or n package (top view)
74ac11086 quadruple 2-input exclusive-or gate scas081a november 1989 revised april 1996 2 post office box 655303 ? dallas, texas 75265 logic diagram (positive logic) 1y 1a 1b 1 16 2 2y 2a 2b 15 14 3 3y 3a 3b 11 10 6 4y 4a 4b 9 8 7 exclusive-or logic an exclusive-or gate has many applications, some of which can be represented better by alternative logic symbols. exclusive or = 1 these are five equivalent exclusive-or symbols valid for a 74ac11086 gate in positive logic; negation may be shown at any two ports. = 2k 2k+1 even-parity element odd-parity element logic-identity element the output is active (high) if all inputs stand at the same logic level (i.e., a=b). the output is active (high) if an even number of inputs (i.e., 0 or 2) are active (high). the output is active (high) if an odd number of inputs (i.e., only 1 of the 2) are active (high). absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 2 supply voltage range, v cc 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i (see note 1) 0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output voltage range, v o (see note 1) 0.5 v to v cc + 0.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0 or v i > v cc ) 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0 or v o > v cc ) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current, i o (v o = 0 to v cc ) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through v cc or gnd 100 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . maximum power dissipation at t a = 55 c (in still air) (see note 2): d package 1.3 w . . . . . . . . . . . . . . . . . . . . n package 1.1 w . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. the maximum package power dissipation is calculated using a junction temperature of 150  c and a board trace length of 750 mils, except for the n package, which has a trace length of zero.
74ac11086 quadruple 2-input exclusive-or gate scas081a november 1989 revised april 1996 3 post office box 655303 ? dallas, texas 75265 recommended operating conditions min nom max unit v cc supply voltage 3 5 5.5 v v cc = 3 v 2.1 v ih high-level input voltage v cc = 4.5 v 3.15 v v cc = 5.5 v 3.85 v cc = 3 v 0.9 v il low-level input voltage v cc = 4.5 v 1.35 v v cc = 5.5 v 1.65 v i input voltage 0 v cc v v o output voltage 0 v cc v v cc = 3 v 4 i oh high-level output current v cc = 4.5 v 24 ma v cc = 5.5 v 24 v cc = 3 v 12 i ol low-level output current v cc = 4.5 v 24 ma v cc = 5.5 v 24 d t/ d v input transition rise or fall rate 0 10 ns/v t a operating free-air temperature 40 85 c electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cc t a = 25 c min max unit parameter test conditions v cc min typ max min max unit 3 v 2.9 2.9 i oh = 50 m a 4.5 v 4.4 4.4 5.5 v 5.4 5.4 v oh i oh = 4 ma 3 v 2.58 2.48 v i24a 4.5 v 3.94 3.8 i oh = 24 ma 5.5 v 4.94 4.8 i oh = 75 ma 2 5.5 v 3.85 3 v 0.1 0.1 i ol = 50 m a 4.5 v 0.1 0.1 5.5 v 0.1 0.1 v ol i ol = 12 ma 3 v 0.36 0.44 v i ol =24ma 4.5 v 0.36 0.44 i ol = 24 ma 5.5 v 0.36 0.44 i ol = 75 ma 2 5.5 v 1.65 i i v i = v cc or gnd 5.5 v 0.1 1 m a i cc v i = v cc or gnd, i o = 0 5.5 v 4 40 m a c i v i = v cc or gnd 5 v 3.5 pf 2 not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
74ac11086 quadruple 2-input exclusive-or gate scas081a november 1989 revised april 1996 4 post office box 655303 ? dallas, texas 75265 switching characteristics over recommended operating free-air temperature range, v cc = 3.3 v 0.3 v (unless otherwise noted) (see figure 1) parameter from to t a = 25 c min max unit parameter (input) (output) min typ max min max unit t plh aorb y 1.5 5.6 9.4 1.5 10.6 ns t phl a or b y 1.5 5.1 7.4 1.5 8.2 ns switching characteristics over recommended operating free-air temperature range, v cc = 5 v 0.5 v (unless otherwise noted) (see figure 1) parameter from to t a = 25 c min max unit parameter (input) (output) min typ max min max unit t plh aorb y 1.5 3.8 6.8 1.5 7.6 ns t phl a or b y 1.5 3.8 6.2 1.5 6.8 ns operating characteristics, v cc = 5 v, t a = 25 c parameter test conditions typ unit c pd power dissipation capacitance per gate c l = 50 pf, f = 1 mhz 27 pf parameter measurement information load circuit from output under test c l = 50 pf (see note a) 500 w t plh t phl v cc 0 v 50% v cc 50% v cc v oh v ol input (see note b) output voltage waveforms notes: a. c l includes probe and jig capacitance. b. input pulses are supplied by generators having the following characteristics: prr 1 mhz, z o = 50 w , t r = 3 ns, t f = 3 ns. c. the outputs are measured one at a time with one input transition per measurement. 50% 50% figure 1. load circuit and voltage waveforms
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (acritical applicationso). ti semiconductor products are not designed, authorized, or warranted to be suitable for use in life-support devices or systems or other critical applications. inclusion of ti products in such applications is understood to be fully at the customer's risk. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 1998, texas instruments incorporated


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